Memory Layout Engineer

Bangalore | 3+ Years

Key Responsibilities:

• 3-7 years of experience in Custom layout, Std cell and Memory Layout design.
• Memory Leafcell layout design from scratch till top level integration.
• Good knowledge on different types of memory architecture.
• Good knowledge in optimized layout design for better performance.
• Proficient in physical verification flow & debug, like DRC, LVS, ERC, Boundary conditions.
• Proficient in Cadence Virtuoso layout editor and Calibre physical verification flow