Memory Design Engineer

Key Roles: Candidate must have hands-on experience and knowledge of SRAM/ROM compilers or custom memories on various process nodes like 7nm, 14nm, 16nm, 28nm, 45nm, 65nm etc. Candidate must have very good understanding of memory architectures, Transistor level circuit...

RTL-ASIC Engineer

Key Roles Experienced in rtl design using verilog / system Verilog Asic designers with experiences in all aspects of rtl design flow from specification/microarchitecture definition to design and verification, timing analysis, dft and implementation Integration, rtl...

Analog Design Engineer

Role and Responsibilities Proficient in Designing at least one of the following Analog IPs: -  Data Converters: Delta-Sigma, ADCs, SAR-ADCs; Current Steering/R2R high speed/precision DACs -  Power Management: High Voltage/Current LDOs -  References: Clocking IPs like...

Analog Layout Engineer

Role and Responsibilities Responsible for Design and development of critical analog, mixed-signal, and full chip level integration support. Perform layout verification like LVS/DRC/Antenna, quality check and documentation. Responsible for on-time delivery of...

DFT Engineer

  Key Responsibilities: Experience in dft scan insertion, atpg at ip and soc level Hands on experience in atpg timing and no-timing simulations Proficient in doing basic unit-level verification using simulations. Scan/atpg patterns & test flows development,...