STA Engineer

Banglalore | 4+ Years

Key Responsibilities:

• Experience in Static Timing Analysis (STA) for ASIC designs
• Experience in developing timing constraints
• Experience in timing closure and optimization
• Proficiency in using scripting languages such as Perl and TCL
• Familiarity with EDA tools such as PrimeTime and Design Compiler
• Experience in Physical Design and/or DFT is a plus
• Bachelor’s or Master’s degree in Electrical/Electronics/Computer Science Engineering or related field