Standard Cell Layout Engineer

Bangalore | 4+ years

Key Roles –

1. Responsible for Design and development of standard cell layouts.
2. Perform layout verification like LVS/DRC/Latch up, quality check and documentation. Responsible for on-time delivery of cell and library level layouts with satisfactory quality. Demonstrate leadership Skills in planning, area/time estimation, scheduling, delegation, and execution to meet project schedule/milestones in multi- project environment.
3. Effectively communicate with design team.
4. Must have 4 + years of experience in standard cell layout designs in advanced CMOS process. Should have expertise in multiple standard cell layout library developments.
5. Should be able to perform standard cell layout development and physical verification activities for complex designs as per provided specifications Should have expertise in layout area and routing optimization, design rules, yield, and reliability issues.
6. Good understanding of layout fundamentals i.e., Electro-migration, Latch-up, coupling, crosstalk, IR-drop, parasitic analysis, matching, shielding, etc.
7. Should have adequate knowledge of schematics, interface with circuit designer and CAD team.
8. Understanding layout effects on the circuit such as speed, capacitance, power, and area etc., Excellent in problem-solving skills in solving area, power, performance, and physical verification of custom layout.
9. Should have leadership qualities and able to do multi-tasking as required. Should be able to work in a team environment and able to guide and provide technical support to the fellow team members.
10. Self-motivated, hardworking, goal-oriented and excellent verbal and written communication skills.
11. Knowledge of Skill coding and layout automation is a plus. Skillset : Std Cell Layout