Standard Cell Layout Engineer (All Levels)

Preferred Education

• BTech/Mtech

Area of Expertise

• Hands-on experience in Standard Cell library development with strong layout skills
• Strong in Standard cell layout edition with a good understanding of CMOS and FinFet technologies
• Strong debugging and problem-solving skills in the areas of physical verification
• Exposure to EDA tools like Cadence Virtuoso, Calibre, Hercules, and other Industry Standard tools
• Programming skills with Perl and Cadence SKILL is a Plus
• Good Analytical skills and being creative is Plus