Preferred Education

  • BTech/Mtech

Area of Expertise

  • RTL / Logic Development in VHDL/Verilog
  • Full FPGA development flow from logic design, place route, timing analysis closure
  • Experience with advanced Xilinx/Intel FPGA families and the Xilinx/Intel development tools including Vivado/Quartus
  • Making testbenches for functional simulation of IP/FPGA design
  • Troubleshooting and debugging FPGA implementations on boards
  • Knowledge of any scripting language such as bash/Perl/python
  • Highly motivated, self-starter with good interpersonal skills and a strong team player
  • Excellent communication, critical thinking, and problem-solving skills

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